| PART |
Description |
Maker |
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| HD74HCT74A HD74HCT74AT HD74HCT74AFP |
Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|TSSOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|SOP|14PIN|PLASTIC
|
Hitachi,Ltd.
HITACHI[Hitachi Semiconductor]
|
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| 74AUP2G79GF 74AUP2G79GS |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| 5962F9863501VXC 5962F9863501VCC 5962F9863501V9A AC |
3-line to 8-line decoder / demultiplexer 16-SOIC 0 to 70
Contact Protector; Weight:163g
Radiation Hardened Quad D-Type Flip-Flop
with Reset(抗辐射四D触发器（带复位功能）)
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
Radiation Hardened Quad D-Type Flip- Flop with Reset
|
Intersil Corporation
Intersil, Corp.
|
| 74LCX74M 74LCX74 |
LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS
DualD-TypeFlip-Flop
|
STMicroelectronics
|
| DM74AS74 DM74AS74SJX DM74AS74M DM74AS74N DM74AS74S |
Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear AS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Dual J-K Master-Slave Flip-Flop
PIN ASSIGNMENT
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
ONSEMI[ON Semiconductor]
|
| KIC7W74FK |
D Flip Flop
SILICON MONOLITHIC CMOS DIGITAL INTEGRATED CIRCUIT(D-TYPE FLIP FLOP WITH PRESET AND CLEAR)
|
Korea Electronics (KEC)
KEC[KEC(Korea Electronics)]
|
